Non-volatile memories (e.g., EEPROM) have two limitations that make simple counter storage difficult. A first limitation is that non-volatile memories have write endurance limits and can only be written a limited number of times before that location becomes unreliable. Typically, this limit is around one hundred thousand cycles. If a counter is incrementally written to non-volatile memory without any wear leveling the counter has an upper limit of 100K cycles.
A second limitation relates to power loss during the write operation. A typical EEPROM is written in two steps. The first step is an erase cycle (e.g., memory to all 1's) and the second step writes the data (e.g., 0's get written over by 1's). If power is lost during the erase/write cycle the memory location might be in an erased state or in a partially programmed state. This problem can be compounded when the memory locations span multiple bytes or pages.